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Financement de l’UE (3 340 621 €) : Dispositif de mémoire de transduction piézoélectronique Hor01/12/2015 Programme de recherche et d'innovation de l'UE « Horizon »
Vue d’ensemble
Texte
Dispositif de mémoire de transduction piézoélectronique
Computer clock speeds have not increased since 2003, creating a challenge to invent a successor to CMOS technology able to resume performance improvement. The key requirements for a viable alternative are scalability to nanoscale dimensions – following Moore’s Law – and simultaneous reduction of line voltage in order to limit switching power. Achieving these two aims for both transistors and memory allows clock speed to again increase with dimensional scaling, a result that would have great impact across the IT industry. We propose to demonstrate an entirely new low-voltage, memory element that makes use of internal transduction in which a voltage state external to the device is converted to an internal acoustic signal that drives an insulator-metal transition. Modelling based on the properties of known materials at device dimensions on the 15 nm scale predicts that this mechanism enables device operation at voltages an order of magnitude lower than CMOS technology while achieving 10GHz operating speed; power is thus reduced two orders.
| AIXACCT SYSTEMS GmbH | 338 250 € |
| DCA-INSTRUMENTS Oy | 397 344 € |
| EIDGENOSSISCHE MATERIALPRUFUNGS- UND FORSCHUNGSANSTALT | 0,00 € |
| Electrosciences Ltd. | 55 000 € |
| IBM RESEARCH GmbH | 0,00 € |
| MAX-PLANCK-GESELLSCHAFT ZUR FORDERUNG DER WISSENSCHAFTEN e. V. | 648 060 € |
| NPL Management Ltd. | 348 609 € |
| Sintef AS | 112 500 € |
| SOLMATES B.V. | 374 313 € |
| Stiftelsen Sintef | 326 988 € |
| The BIO Nano Centre Ltd. LBG | 532 809 € |
| The University of Edinburgh | 0,00 € |
| Universiteit Gent | 206 750 € |
https://cordis.europa.eu/project/id/688282
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